The column output circuit is realized by double sample and hold circuit which can effectively decrease fpn ( fixed pattern noise ) 列输出电路采用双采样电路,该电路能有效地消除固定模式噪声。
The system , based on 89c51 , has two stages of sampling and holding circuits , which can discriminates positive - going edge and negative - going edge of signals , providing signal peak information 如果以横坐标为信号道址、纵坐标为道址对应的计数率,可以得到一条核辐射谱线。
The sample and hold circuit is employed by the bottom plate sampling technique , which could not only cancel the charge injection error but also eliminate the effect of clock feed - through 采样保持电路设计采用了电容下极板采样技术,不仅有效地避免了电荷注入效应引起的采样信号失真,而且消除了时钟馈通效应的不良影响。